EtherCAT Device Driver
Learn how to acquire data from and control EtherCAT devices using Synnax.
The Synnax Driver supports reading and writing data from EtherCAT devices. EtherCAT (Ethernet for Control Automation Technology) is a real-time industrial Ethernet protocol designed for high-performance automation and control applications.
Supported EtherCAT Masters
The Synnax Driver supports two EtherCAT master implementations:
IgH EtherCAT Master
The IgH EtherCAT Master is a Linux kernel module that provides deterministic, real-time EtherCAT communication.
- Recommended for production deployments
- Higher performance with deterministic timing
- Requires kernel module installation
- Linux only (including NI Linux RT)
For installation instructions, see the IgH EtherCAT Master documentation. Note that IgH requires a compatible network interface card.
SOEM (Simple Open EtherCAT Master)
SOEM is a user-space EtherCAT master library that runs on multiple platforms.
- Bundled with the Synnax Driver - no additional installation required
- Cross-platform: Windows, macOS, and Linux
- Good for development, testing, and non-real-time applications
- Does not require kernel modifications
Compatible Devices
The Synnax Driver works with any EtherCAT-compatible device. Common vendors include:
Supported Operating Systems
Docker is not supported because EtherCAT requires direct access to the network interface for raw Ethernet communication.
Key Terminology
EtherCAT uses specific terminology that differs from other industrial protocols:
- Master -> The controller that manages the EtherCAT network (IgH or SOEM in Synnax).
- Slave (Device) -> An EtherCAT device on the network. This documentation uses “device” for clarity.
- PDO (Process Data Object) -> Cyclic data exchanged between master and devices.
- TxPDO -> Transmit PDO. Data sent FROM the device TO Synnax (sensor readings).
- RxPDO -> Receive PDO. Data sent TO the device FROM Synnax (control commands).
- CoE (CAN over EtherCAT) -> Protocol for accessing device parameters using index and subindex addressing.